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Name: Sudhir Dakey Designation: Asst. Professor Date of birth:07-10-1982 Qualifications: M.Tech, JNTUH, 2008 B.E., JNTUH, 2005
Work Experience: Teaching : 10 Years Area of specialization: VLSI System Design.
Email : This email address is being protected from spambots. You need JavaScript enabled to view it.
Subjects taught at U.G Level: Vlsi Design, Verilog HDL, Radar and Satellite Communication Systems Subjects taught at P.G Level: Digital IC Design, Vlsi Design and Technology, Scripting Languages for VLSI Design Automation |
Scholastic Performance:
|
Course |
Board/ University |
Specialization (if any) |
Year of Completion |
% of Marks Obtained |
|
S.S.C |
Maharashtra State Board Of Secondary and Higher Secondary Education, Pune |
---- |
1999 |
67.73 |
|
INTER |
Board of Intermediate Education, AP |
Mathematics, Physics and Chemistry |
2001 |
90.10 |
|
B. Tech. |
Jawaharlal Nehru Technological University, Hyderabad |
Electronics & Communication Engg. |
2005 |
67.47 |
|
M.Tech. |
Jawaharlal Nehru Technological University, Hyderabad |
VLSI SystemDesign |
2008 |
73.03 |
|
Ph.D |
|
|
|
|
|
If any other |
|
|
|
|
Teaching Experience in the college:
|
S.No |
College |
Designation |
Period |
Experience in years |
|
1
|
MVSR Engineering College, Hyderabad |
Assistant Professor |
From 22nd July, 2008 to date |
9 ½ Years |
List of Journal Papers Published(from the date of joining in the college):
|
SNO |
Title of the paper |
Journal |
Vol/Issue/page No/ISSN No |
Month & Year |
National / International |
|
1 |
A Novel scheme of BSIR for Embedded Memories |
International Journal of Systems, Algorithms & Applications (IJSAA) |
Volume 3, Issue ICASE 13, ISSN Online: 2277-2677 |
April 2013 |
International |
|
2 |
Self Immunity To Reinforce The Vulnerability Factors on Soft Errors In 64 Bit Register File |
IOSR Journal of Electronics and Communication Engineering (IOSR-JECE) |
Volume 6, Issue 4, e-ISSN : 2278-2834, p-ISSN : 2278-8735 |
May-Jun 2013 |
International |
|
3 |
An approach for Optimized timing of Error correcting Unordered codes |
International Journal of Engineering Trends and technology (IJETT) |
Volume 4, Issue 8, ISSN : 2231-5381 |
August 2013 |
International |
|
4 |
Design,Implementation and performance analysis of 8-bit Vedic Multiplier
|
International Journal of Modern Trends in Engineering and Research (IJMTER) |
Volume 02, Issue 06, ISSN (Online):2349–9745 ; ISSN (Print):2393-8161, Pages : 259-269 |
June– 2015 |
International |
|
5 |
Design and Implementation of Area Delay Efficient Booth Multiplier Based on CBL |
International Journal & Magazine of Engineering, Technology, Management and Research (IJMETMR), |
Volume 2, Issue 7, ISSN : 2348-4845, Pages : 562-568 |
July 2015 |
International |
|
6 |
Efficient Area and High Speed Advanced Encryption Standard Algorithm |
International Journal of Emerging Engineering Research and Technology (IJEERT)
|
Volume 3, Issue 7, ISSN 2349-4395 (Print) & ISSN 2349-4409 (Online), Pages : 140-146 |
July 2015 |
International |
|
7 |
DESIGN AND ANALYSIS OF A FULL ADDER USING VARIOUS REVERSIBLE GATES |
International Journal of Modern Trends in Engineering and Research (IJMTER) |
Volume 02, Issue 08, ISSN (Online):2349–9745 ; ISSN (Print):2393-8161, Pages : 449-456 |
August – 2015 |
International |
|
8 |
An Overview of Security Issues in Internet of Things |
International Journal of Modern Trends in Engineering and Research (IJMTER) |
Volume 02, Issue 11, ISSN (Online):2349–9745 ; ISSN (Print):2393-8161, Pages : 100-108 |
Nov-2015 |
International |
|
9 |
Removal of Artifacts Based on Weighted Guided |
International Journal of Research (IJR) |
Volume 04, Issue 02, ISSN (Print):2348-6848, Pages : 2459-2465 |
Feb-2017 |
International |
|
10 |
Design of Area and Power Efficient Line Decoders |
International Journal of Emerging Technologies in Engineering Research (IJETER) |
Volume 5, Issue 11; ISSN : 2454-6410, Pages : 51-56 |
November (2017) |
International |
List of Conference Papers Presented (from the date of joining in the college):
|
Sl. no |
Topic |
Venue |
Dates |
|
1 |
A Novel scheme of Repair using BISR for Embedded Memories |
National Conference on Recent Trends in Information Technology (NCRTIT’13), Chaitanya Bharathi Institute of Technology |
22nd and 23rdMarch, 2013 |
|
2 |
A Novel scheme of BISR for Embedded Memories |
2nd International Conference on Applied Sciences and Engineering (2ndICASE) |
31st March, 2013
|
, List of Books Authored: NIL
Professional bodies in which Membership is taken:
Member of Indian Society for Technical Education (ISTE), New Delhi. (LM 82608 Year 2012)
Member of Institute of Electronics & Telecommunication Engineers (IETE), New Delhi. (M 228908) (September 2013)
Member of Institution of Engineers (India), New Delhi. (M 147146-5) (July 2013)
Member of The Indian Science Congress Association (ISCA), Kolkata. (L 22088) (May 2013)
Member of International Association of Engineers (IAENG), Hong Kong. (M 129878) (April 2013)
Member of Society of EMC Engineers (India), Bangalore. (LM 1154) (March 2014)
Member of Magnetics Society of India (MSI), Hyderabad. (LM 556) (May 2013)
Number of Conferences/ Workshops/ Seminars attended(from the day of joining in the college):
|
S. no |
Topic |
Organized by |
Dates |
|
1 |
A One-Day Tutorial on Analog filters and Mixed signal Design |
CDAC, Hyderabad |
12th September 2008 |
|
2 |
Lab VIEW – A Virtual Laboratory Hands on Training Event for the Faculty |
MVSR Engg. College |
17th to 19thSeptember 2009 |
|
3 |
A Two Day course on Embedded Systems |
IETE, Hyderabad |
28th & 29th January 2012 |
|
4 |
A Two week ISTE workshop on Introduction to Research Methodologies |
IIT Bombay |
25th June to 4th July 2012 |
|
5 |
A 3 day workshop on Recent Advances in Embedded Systems |
IETE Hyderabad |
28th, 30th and 31stDecember 2012 |
|
6 |
A Two week ISTE workshop on Analog Electronics |
IIT Kharagpur |
4th June to 14thJune 2013 |
|
7 |
A 3 day workshop on VLSI Design using Cadence Tools |
Dept. of ECE, CBIT |
27th to 29th March 2014 |
|
8 |
One week Faculty Development Program on RECENT ADVANCES IN VLSI |
Dept. of ECE, UCE(A), OU |
9th to 14th June 2014 |
|
9 |
A 4 day workshop/training program on Advanced Digital Design using Verilog HDL |
Dept. of ECE, MVSREC |
28th to 31st January 2015 |
|
10 |
A 1 day FDP on Android |
Dept. of CSE, MVSREC |
16th July 2015 |
|
11 |
One Week FDP on Embedded System design & Applications – Hands On |
Dept. of IT, MVSREC |
28th December 2015 to 2nd January 2016 |
|
12 |
One Week FDP on Digital Image & Video Processing with Hands-on |
Dept. of CSE, MVSREC |
4th January 2016 to 8th January 2016 |
|
13 |
Two Day FDP on Analog and Digital Circuit Design using Cadence |
Dept. of ECE, MVSREC |
12th & 13th January 2016 |
|
14 |
Two Day FDP on Xilinx Vivado Design Suite |
Dept. of ECE, MVSREC |
22nd & 23rdSeptember 2016 |
|
15 |
A One Week FDP on Signal Processing Techniques |
Dept. of ECE, MVSREC |
15th to 19thNovember 2016 |
|
16 |
One Week FDP on Recent Trends in Network Security with Hands-on using ns-3 |
Dept. of CSE & IT, MVSREC |
19th to 24thDecember 2016 |
|
17 |
A Two week ISTE workshop on CMOS, Mixed Signal and Radio Frequency VLSI Design |
IIT Kharagpur |
30th January to 4thFebruary 2017 |
|
18 |
Technical Seminar on Big Data Analytics and its Future |
Dept. of I.T., MVSR Engg. College |
18th February 2017 |
|
19 |
Three Day Intensive Training On Analog, Digital & Mixed Signal VLSI design using Mentor Graphics Tools |
Dept. of ECE, MVSREC |
13th to 15thSeptember 2017 |
|
20 |
Two Day Training Program On Embedded System Design |
Dept. of ECE, MVSREC |
16th to 17th October 2017 |
